Research

My research interests span the areas of hardware security, computer architecture, and reconfigurable computing. With a background on hardware accelerators and self-adaptive hardware, my latest interests focus on FPGA and embedded systems security, particularly on building hardware and architectural support for security in heterogeneous architectures, hardware accelerators, and emerging computing paradigms.

My approach is based on a cross-layer, design-for-security methodology to mitigate hardware and software-induced attacks, including: (1) vulnerability discovery in existing micro/architectures of hardware accelerators, (2) Design Space Exploration for secure micro/architectures, and (3) design of countermeasures based on adaptive micro/architectures, software codes and runtime managers.

I am currently working on different dimensions of side-channel security of Deep Learning hardware and heterogeneous accelerators, studying the interplay between approximate computing and security, and exploring remote attacks to FPGAs.

You can find a list of current and past projects in my projects page